1. Technical Field
The present disclosure is related to a semiconductor memory device, and in particular to, a method for auto-refreshing memory cells in a semiconductor memory device and the semiconductor memory device using the method, wherein the semiconductor memory device has an open bit line architecture.
2. Description of Related Art
Currently, the semiconductor memory device technology develops fast, and the semiconductor memory devices with large capacities are usually used in our daily life. Some semiconductor memory device, such as dynamic random access memory (DRAM), needs to refresh the memory cells thereof, since the charges stored in the memory cells may run off due to the leakage path or reading operation of the semiconductor memory device.
Referring to FIG. 1A, FIG. 1A is a schematic diagram showing a conventional method for auto-refreshing the memory cells in a semiconductor memory device with a folded bit line architecture. The semiconductor memory device with the folded bit line architecture comprises several memory banks 10A through 10D, and each of the memory banks 10A through 10D has several sectors SEC[0] through SEC[2n−1] with different indices, wherein n is a positive integer larger than 1.
In FIG. 1A, the word lines in the sectors SEC[0] of the memory banks 10A through 10D are selected in the current cycle, and the memory cells of the four selected word lines are refreshed. In the next cycle, the word lines in the sectors SEC[1] of the memory banks 10A through 10D are selected, and the memory cells of the four selected word lines are refreshed. It is thus known that the memory cells in the four word lines are refreshed in each one cycle.
Referring to FIG. 1B, FIG. 1B is a schematic diagram showing a conventional method for auto-refreshing the memory cells in a semiconductor memory device with an open bit line architecture. The semiconductor memory device with the open bit line architecture comprises several memory banks 12A through 12D, and each of the memory banks 12A through 12D has two particular sectors SEC[0] with the same index and remained sectors SEC[1] through SEC[2n−1] with different indices, wherein n is a positive integer larger than 1.
In FIG. 1B, the word lines in the particular sectors SEC[0] with the same index of the memory banks 12A through 12D are selected in the current cycle, and the memory cells of the eight selected word lines are refreshed. In the next cycle, the word lines in the remained sectors SEC[1] of the memory banks 12A through 12D are selected, and the memory cells of the four selected word lines are refreshed. It is thus known that the memory cells in the eight word lines are refreshed merely in specific one cycle, and the memory cells in the four word lines are refreshed in the other cycles.
It is noted that the refreshing voltage and the chip area is related to the number of the selected word lines in the cycle. Since the semiconductor memory device with the open bit line architecture selects eight word lines in specific one of several cycles, the refreshing voltage generated by the charge pump in the semiconductor memory device with the open bit line architecture would be higher than that generated in the semiconductor memory device with the folded bit line architecture, and the chip area of the semiconductor memory device with the open bit line architecture is larger than that of the semiconductor memory device with the folded bit line architecture (p.s. the higher the voltage the charge pump generates, the larger the chip area of the charge pump is; and the more the word lines are selected in the specific one cycle, the larger the chip area of the memory bank is). Thus, the semiconductor memory device with the open bit line architecture has more cost due to the charge pump with the higher generated voltage and the larger chip area.